Analog Layout Engineer
Experience: 3 to 5 Years
Qualification: B.E / B. Tech / M.E / M. Tech
ESSENTIAL DUTIES AND RESPONSIBILITIES:
- Candidate should have a strong knowledge on devices and process/fabrication technology.
- Should have work experience in 7nm, 10nm, 14nm, 16nm etc
- Good understating of Deep Submicron issues and layout techniques.
- Expertise on matching, parasitic reduction, ESD, DFM etc.
- Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc.
- Cadence Virtuoso Layout editor (L/XL/GXL)
- Verification tools: Assura/PVS/Calibre/ Hercules
- Scripting Knowledge of perl/shell/skill are highly preferred
Job Location: Finland: Oulu India: Bangalore India: Chennai India: Hyderabad India: Noida Malaysia S. Korea: Seoul Singapore Sweden: Stockholm USA: Delaware USA: Texas
Job Category: VLSI (Silicon engineering)