Job Title: ASIC RTL Design Engineer
Position Experience Level: 6 to 10 years
We are seeking a highly skilled and experienced ASIC RTL Design Engineer to join our team in Bangalore. The successful candidate will have 6 to 10 years of relevant experience and will play a crucial role in the design and integration of RTL components for complex ASIC projects. The candidate should possess a strong background in RTL UPF, SoC Design Integration, and multi-domain UPF methodologies. Additionally, a strong understanding of resolving VSI issues is required to excel in this role.
- RTL UPF Experience: The ideal candidate should have a proven track record of working with RTL UPF (Unified Power Format) to efficiently manage power intent for ASIC designs.
- SoC Design Integration: Experience in the integration of RTL components into System-on-Chip (SoC) designs, ensuring seamless functionality and performance.
- Multi-Domain UPF: Proficiency in working with multi-domain UPF to address power management across different aspects of the design.
- VSI Issue Resolution: Ability to identify and rectify VSI (Voltage Storm Immunity) issues to enhance the reliability and robustness of the ASIC design.
In addition to the core responsibilities, candidates who have experience in addressing UPF constraints and issues during the synthesis process and Engineering Change Orders (ECOs), including mitigating RTL-UPF mismatches, will be considered favorably.
This position offers an exciting opportunity to work on cutting-edge ASIC projects, pushing the boundaries of design and innovation. If you are a seasoned RTL Design Engineer with the requisite experience and skills, we encourage you to apply and join our dynamic team in Bangalore.